PTM: A Technology Mapper for Pass-Transistor Logic

Pass-Transistor Mapper (PTM), a logic synthesis tool speci cally designed for passtransistor based logic library that has only three basic cells, is reported. It exploits the close relationship between BDD representation of logic and the structure of pass-transistor logic cells to ensure e cient technology mapping. BDD variable order optimization is achieved through a genetic algorithm with dynamic parameters. Unlike LEAP, the only previously reported system for pass-transistor logic, PTM integrates both synthesis and logic optimization in one step and can be used for large logic functions. Results of using PTM on a large set of benchmarks are compared to that from Berkeley's SIS using the MCNC CMOS cell library and are found to be promising. Indexing terms: CMOS, Pass-Transistor, Logic synthesis, Technology Mapping